1. Field of the Invention
The present invention relates in general to the field of Integrated Circuits (ICs). Specifically, the invention concerns trimming methods, and related structures, adapted to allowing the implementation of functional parameters adjustment in ICs.
2. Description of the Related Art
Producing an IC is a very complex task, which involves several phases. In very general terms, starting for example from the IC architectural design, the different electronic circuits/circuit blocks are designed and simulated by means of CAD tools, then the physical layout of the several different IC layers is defined and the photolithographic masks necessary for the planar technology manufacturing process are fabricated. Once the masks are released, the IC is fabricated, and, at the end of the fabrication process, a testing phase checks whether the IC correctly performs the intended tasks, and satisfies the design requirements.
There are a number of functional parameters (voltages, currents, time delays, resistance and capacitance values) that, despite careful design and simulation of the different IC circuits/circuit blocks, are subject to deviations of their actual values compared to the intended, expected ones. This is mainly due to the practical, and, in some respects, even theoretical, impossibility of eliminating fluctuations in, e.g., the fabrication process parameters (e.g., dopant species concentrations, alignment of masks, and a number of other variables).
As a consequence to this unavoidable, statistical variations in the IC functional parameters, several of the produced IC samples might have to be discarded because they do not respect the intended specifications.
In order to avoid this, which could severely impact the manufacturing process yield, IC designers usually provide in the ICs trimming structures adapted to implement a post-manufacturing adjustment of at least the most critical IC functional parameters.
Several ways are possible for implementing the possibility of trimming the IC functional parameters, such as for example the provision of fuses, to be selectively burnt. A more usual and preferred way calls for providing within the IC memory registers, usually programmable electrically and capable of retaining the stored information even in absence of power supply. By storing in these register prescribed codes (configuration codes), different operating configurations for selected IC circuits/circuit blocks can be achieved, so as to adjust desired IC functional parameters; for this reason, these registers are also referred to as trimming configuration registers.
Typically, this kind of trimming is performed during the testing phase of the IC, and can be expediently exploited not only for ensuring that a specific IC satisfies the desired requirements, but also as an investigation means, for enabling the IC designer, and the process engineer, to refine the design, and the process flow with the aim of coming to a consolidated product.
The circuits/circuit blocks that are most frequently rendered trimmable include generators of voltages/currents, and particularly reference voltage/current generators/regulators.
A widely employed voltage reference is the so-called “bandgap” voltage reference generator, a per-se well-known circuit capable of furnishing a very stable voltage (the bandgap voltage), particularly in respect of temperature changes, a result that is achieved thanks to the fact that the changes in temperature in the base-emitter voltage (Vbe) of a bipolar junction transistor are compensated by those of a voltage proportional to the thermal voltage (VT).
Bandgap voltage reference generators are used for example in semiconductor memories, such as Flash memories, possibly in combination with on-chip voltage generators/regulators, for deriving the IC internal voltages necessary to perform the memory read, program and erase operations; in particular the bandgap voltage is used as a voltage reference for voltage regulators at the output of charge-pump voltage generators, for Voltage-Controlled Oscillators (VCO), for low-power supply detectors.
In a bandgap voltage reference generator the proportionality factor that determines the temperature compensation of the voltage Vbe is univocally determined by resistive ratios. Such resistive ratios, and thus the proportionality factor, are usually dimensioned in the IC design phase, based on models derived from measurements conducted on different manufactured wafer lots. Regretfully, the actual behavior of the bandgap reference voltage generator in the final IC, and particularly the dependence of the voltage Vbe on temperature, differs from the one forecasted, thus the bandgap voltage might suffer of more or less pronounced dependence on the temperature.
For this reason, the designers implement in the IC the possibility of varying, in the testing phase, the actual value of the proportionality factor, exploiting trimming configuration registers.
During the testing phase (a phase referred to in jargon as Electrical Wafer Sort—EWS), the bandgap voltage is measured at one of the pads of the IC, thanks to the activation of an N-channel pass MOSFET (intended to be kept off during the IC normal operation, by keeping its gate grounded) that connects the output of the bandgap reference voltage generator to the pad. Depending on the measured value, the proportionality factor is adjusted by varying the trimming configuration.
In several ICs, the bandgap reference voltage is exploited by a number of circuits/circuit blocks, particularly reference voltage/current generators/regulators. For example, in the case of a semiconductor memory IC, particularly an electrically programmable and erasable device such as a Flash memory, the bandgap reference voltage may be exploited for generating/regulating the voltages to be supplied to the wordline selectors, to the program load circuits, the sense amplifiers, the bulk electrodes of the memory cells, and the like.
Since varying the proportionality factor of the bandgap reference voltage generator also causes the bandgap reference voltage to change with respect to the value expected in the design phase, it becomes necessary to trim also the circuits/circuit blocks that exploit the bandgap reference voltage, particularly the voltage regulators: these need to be equipped with trimmable circuit structures. Configuration registers dedicated to trimming these other circuit blocks are thus provided for.
In the Applicant's opinion, the known implementations of the functional parameters trimming in ICs exhibit some problems.
A problem of the known solutions is that, being the trimmable circuit structures that exploit the bandgap reference voltage, namely the voltage regulators, normally uncorrelated from each other, it is necessary to trim each circuit block individually, with a significant waste of time. In particular, the IC testing time suffers from a significant impact due to the trimming of all the trimmable circuit structures.
Measuring the bandgap reference voltage value is also a source of other problems. The pass MOSFET that enables connecting the bandgap reference voltage output to the IC pad, should be kept off during the normal operation of the IC (in the designer's intentions, this should be ensured by the fact that the pass MOSFET gate is kept grounded). However, due to the presence of parasitic elements (e.g., inductances of the bonding leads that connect the IC pads to the IC package pins, parasitic inductances of the printed circuit board on which the IC is mounted, and the like), the voltage levels on the IC pads are far from ideal, and are affected by overshoots/undershoots over/below the supply voltage VDD/the reference voltage GND. If the voltage at the pad falls below the ground of an amount equal to or higher than the pass MOSFET threshold voltage, the pass MOSFET turns on, entering the saturation or even linear region, and current may be sunk from the output of the bandgap reference voltage generator.
Bandgap reference voltage generators are never designed to deliver output currents; the main objective in the design of bandgap reference voltage generators is the current consumption, which is kept as low as possible (e.g., less than 10 microamperes), so as to allow the bandgap reference voltage generators to be kept on even when the ICs are put in stand-by.
Thus, an even limited current absorption (e.g., 2 or 3 microamperes) from the bandgap reference voltage generator easily causes the bandgap voltage to fall from the intended value, to an extent that depends, among other factors, on the absorbed current, the voltage undershoot, the undershoot duration, the parasitic capacitance seen by the output node of the bandgap reference voltage generator.
For example, the Applicant has experimentally verified that the bandgap reference voltage may fall several tens of mV below the expected value (e.g., for an undershoot of approximately 1V, causing a current sink of approximately 200 microamperes, a fall of roughly 60 mV in the bandgap reference voltage has been observed), and a relatively long time (some hundreds of nanoseconds) is required for the bandgap voltage to return to the expected value.
A more or less direct consequence of the fluctuations in the bandgap reference voltage is that all the voltages that are in some way derived therefrom experience a corresponding fluctuation, but amplified by the voltage gain of the circuits used to derive them, and evolve in time following the bandgap reference voltage.
Furthermore, when the voltage at the IC pad goes negative, the bulk-drain PN junction of the pass MOSFET is forwardly biased, and thus a relatively high current (of the order of the milliampere) is sunk from the bulk; this causes an unnecessary and undesired current consumption, especially in stand-by or power-down modes.
An additional problem that the Applicant has observed relates to the propagation of disturbances at the IC pad to the output node of the bandgap reference voltage generator, through the source-drain parasitic capacitance of the pass MOSFET, and also the propagation of disturbances from the gate of the pass MOSFET, to the output of the bandgap voltage generator, through the gate-source parasitic capacitance thereof.
Dual problems are encountered in case a P-channel pass MOSFET is used, in substitution of the N-channel one: in this case, the problems derive from voltage overshoots at the IC pad. A CMOS pass-gate adds up the problems of an N-channel and a P-channel pass MOSFETs.
All these problems may greatly impair the correct functionality of the bandgap reference voltage generator and, as a consequence, of the whole IC.
Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above.